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ISL28191, ISL28291
Data Sheet February 20, 2008 FN6156.5
Single and Dual Single Supply Ultra-Low Noise, Low Distortion Rail-to-Rail Output, Op Amp
The ISL28191 and ISL28291 are tiny single and dual ultra-low noise, ultra-low distortion operational amplifiers. They are fully specified to operate down to +3V single supply. These amplifiers have outputs that swing rail-to-rail and an input common mode voltage that extends to ground (ground sensing). The ISL28191 and ISL28291 are unity gain stable with an input referred voltage noise of 1.7nV/Hz. Both parts feature 0.00018% THD+N at 1kHz. The ISL28191 is available in the space-saving 6 Ld TDFN (1.6mmx1.6mm) and 6 Ld SOT-23 packages. The ISL28291 is available in the 8 Ld SOIC, 10 Ld 1.8mmx1.4mm TQFN and 10 Ld MSOP packages. All devices are guaranteed over -40C to +125C.
Features
* 1.7nV/Hz input voltage noise at 1kHz * 1kHz THD+N typical 0.00018% at 2VP-P VOUT * Harmonic Distortion -76dBc, -70dBc, fo = 1MHz * 61MHz -3dB bandwidth * 630V maximum offset voltage * 3A input bias current * 100dB typical CMRR * 3V to 5.5V single supply voltage range * Rail-to-rail output * Ground Sensing * Enable pin (not available in the 8 Ld SOIC package option) * Pb-free (RoHS compliant)
Ordering Information
PART NUMBER ISL28191FHZ-T7* (Note 1) Coming Soon ISL28191FRUZ (Note 2) PART MARKING GABJ M8 PACKAGE (Pb-free) PKG. DWG. #
Applications
* Low noise signal processing * Low noise microphones/preamplifiers * ADC buffers * DAC output amplifiers * Digital scales
6 Ld SOT-23 MDP0038 6 Ld TDFN 6 Ld TDFN L6.1.6x1.6A L6.1.6x1.6A
Coming Soon M8 ISL28191FRUZ-T7* (Note 2) ISL28291FUZ (Note 1) ISL28291FUZ-T7* (Note 1) Coming Soon ISL28291FBZ (Note 1) Coming Soon ISL28291FBZ-T7 (Note 1) 8291Z 8291Z
10 Ld MSOP MDP0043 10 Ld MSOP MDP0043 MDP0027 MDP0027
* Strain gauges/sensor amplifiers * Radio systems * Portable equipment * Infrared detectors
28291 FBZ 8 Ld SOIC 28291 FBZ 8 Ld SOIC
Coming Soon F ISL28291FRUZ-T7* (Note 2)
10 Ld TQFN L10.1.8x1.4A
*Please refer to TB347 for details on reel specifications. NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pbfree soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2006-2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL28191, ISL28291 Pinouts
ISL28191 (6 LD SOT-23) TOP VIEW
OUT 1 V- 2 IN+ 3 6 V+ 5 EN 4 IN-
ISL28191 (6 LD 1.6X1.6X0.5 TDFN) TOP VIEW
OUT 1 IN- 2 -+ IN+ 3 6 V+ 5 EN 4 V-
+-
ISL28291 (8 LD SOIC) TOP VIEW
OUT_A 1 IN-_A 2 IN+_A 3 V- 4 + + 8 V+ 7 OUT_B 6 IN-_B 5 IN+_B OUT_A 1 IN-_A 2 IN+_A 3 V- 4 EN_A 5
ISL28291 (10 LD MSOP) TOP VIEW
10 V+ + + 9 OUT_B 8 IN-_B 7 IN+_B 6 EN_B
ISL28291 (10 LD TQFN) TOP VIEW
OUT_A OUT_B 8 7 + IN+_A 2 + 6 IN+_B IN-_B 5 EN_B V+ 9 4 EN_A
10
IN-_A
1
3 V-
2
FN6156.5 February 20, 2008
ISL28191, ISL28291
Absolute Maximum Ratings (TA = +25C)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/s Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Tolerance Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Information
Thermal Resistance JA (C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 6 Ld TDFN Package . . . . . . . . . . . . . . . . . . . . . . . 120 8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 115 6 Ld TQFN Package . . . . . . . . . . . . . . . . . . . . . . . 143 Ambient Operating Temperature Range . . . . . . . . .-40C to +125C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = 5.0V, V- = GND, RL = Open, RF = 1k, AV = -1 unless otherwise specified. Parameters are per amplifier. Typical values are at V+= 5V, TA = +25C. Boldface limits apply over the operating temperature range, -40C to +125C, temperature data guaranteed by characterization. CONDITIONS MIN (Note 3) TYP MAX (Note 3) UNIT
PARAMETER DC SPECIFICATIONS VOS V OS --------------T IIO IB CMIR CMRR PSRR AVOL VOUT
DESCRIPTION
Input Offset Voltage Input Offset Drift vs Temperature Input Offset Current Input Bias Current Common-Mode Input Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Maximum Output Voltage Swing VCM = 0V to 3.8V VS = 3V to 5V VO = 0.5V to 4V, RL = 1k Output low, RL = 1k Output high, RL = 1k, V+ = 5V 4.95 4.92 0 78 74 90 86 Figure 21
270 3.1 35 3
630 840
V V/C
500 900 6 7 3.8
nA A V dB dB dB
100 80 98 20 4.97 2.6 26 3.5 3.9 35 48 50 80
mV V mA A mA mA
IS,ON IS,OFF IO+ IOVSUPPLY VENH VENL
Supply Current, Enabled Supply Current, Disabled Short-Circuit Output Current Short-Circuit Output Current Supply Operating Range EN High Level EN Low Level RL = 10 RL = 10 V+ to VReferred to VReferred to V95 90 95 90 3 2
130 130 5.5
V V
0.8
V
3
FN6156.5 February 20, 2008
ISL28191, ISL28291
Electrical Specifications
V+ = 5.0V, V- = GND, RL = Open, RF = 1k, AV = -1 unless otherwise specified. Parameters are per amplifier. Typical values are at V+= 5V, TA = +25C. Boldface limits apply over the operating temperature range, -40C to +125C, temperature data guaranteed by characterization. (Continued) CONDITIONS VEN = V+ VEN = VMIN (Note 3) TYP 0.8 20 MAX (Note 3) 1.1 1.3 80 100 UNIT A nA
PARAMETER IENH IENL
DESCRIPTION EN Pin Input High Current EN Pin Input Low Current
AC SPECIFICATIONS GBW THD+N HD (1MHz) ISO X-TALK ISL28291 PSRR CMRR en in -3dB Unity Gain Bandwidth Total Harmonic Distortion + Noise 2nd Harmonic Distortion 3rd Harmonic Distortion Off-state Isolation fO = 100kHz Channel to Channel Crosstalk fO = 100kHz Power Supply Rejection Ratio fO = 100kHz Common Mode Rejection Ratio fO = 100kHz Input Referred Voltage Noise Input Referred Current Noise AV = +1, VIN = 100mVP-P, RF = 0 CL = 20pF, AV = 1, RL = 10k VS = 2.5V, AV = +1, VIN = 1VP-P, RF = 0, CL = 20pF, AV = 1, RL = 10k VS = 2.5V, AV = +1, VSOURCE = 1VP-P, RF = 0, CL = 20pF, AV = 1, RL = 10k VS = 2.5V, AV = +1, VCM = 1VP-P, RF = 0, CL = 20pF, AV = 1, RL = 10k fO = 1kHz fO = 1kHz RF = 0, CL = 20pF, AV = 1, RL = 10k f = 1kHz. VOUT + 2VP-P, AV = +1, RL = 10k 2VP-P output voltage, AV = 1 61 0.00018 -76 -70 -38 -105 -70 -65 1.7 1.8 MHz % dBc dBc dB dB dB dB nV/Hz pA/Hz
TRANSIENT RESPONSE SR tr, tf, Small Signal tr, tf Large Signal Slew Rate Rise Time, tr 10% to 90% Fall Time, tf 90% to 10% Rise Time, tr 10% to 90% Fall Time, tf 90% to 10% Rise Time, tr 10% to 90% Fall Time, tf 90% to 10% tEN ENABLE to Output Turn-on Delay Time; 10% EN - 10% VOUT ENABLE to Output Turn-off Delay Time; 10% EN - 10% VOUT NOTE: 3. Parts are 100% tested at +25C. Temperature limits established by characterization and are not production tested. AV = 2, VOUT = 1VP-P; RL = 10k, RF /RG = 499/499, CL = 1.2pF AV = 2, VOUT =4.7VP-P; RL = 10k, RF /RG = 499/499, CL = 1.2pF AV = 1, VOUT = 1VDC, RL = 10k, CL = 1.2pF AV = 1, VOUT = 0VDC, RL = 10k, CL = 1.2pF AV = 1, VOUT = 0.1VP-P, RL = 10k, CL = 1.2pF 12 12 17 7 12 44 50 190 190 330 50 V/s ns ns ns ns ns ns ns ns
4
FN6156.5 February 20, 2008
ISL28191, ISL28291 Typical Performance Curves
3 2 CLOSED LOOP GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 V+ = 5V AV = +1 CL = 10pF VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) RL = 1k RL = 100 10M 100M RL = 10k RL = 100k CLOSED LOOP GAIN (dB) 10 8 6 4 2 0 -2 -4 -6 -8 V+ = 5V AV = +1 RL = 10k VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) CL = 10pF CL = 20pF CL = 110pF CL = 57pF CL = 57pF CL = 32pF
-7 10k
-10 10k
10M
100M
FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS RLOAD
FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS CLOAD
2 1 CLOSED LOOP GAIN (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 10k V+ = 5V AV = +1 RL = 10k CL = 10pF 100k
VOUT = 1mVP-P VOUT = 10mVP-P
70 60 50 GAIN (dB) AV = 1000, RF = 499k, RG = 499 V+ = 5V RL = 10k VOUT = 100mVP-P
VOUT = 100mVP-P
40 30 20 AV = 10, RF = 4.42k, RG = 499 10 0 AV = 1, RF = 0, RG = INF 100k 1M FREQUENCY (Hz) 10M 100M AV = 100, RF = 49.9k, RG = 499
VOUT = 1VP-P
1M FREQUENCY (Hz)
10M
100M
-10 10k
FIGURE 3. -3dB BANDWIDTH vs VOUT
FIGURE 4. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
1M
100k
100k V+ = 5V, 3V ENABLED AND DISABLED VSOURCE = 1VP-P
OUTPUT IMPEDANCE ()
INPUT IMPEDANCE ()
10k
10k
V+ = 5V, 3V VSOURCE = 1VP-P
1k
1k
100 10k
100k
1M FREQUENCY (Hz)
10M
100M
100 10k
100k
1M FREQUENCY (Hz)
10M
100M
FIGURE 5. INPUT IMPEDANCE vs FREQUENCY
FIGURE 6. DISABLED OUTPUT IMPEDANCE vs FREQUENCY
5
FN6156.5 February 20, 2008
ISL28191, ISL28291 Typical Performance Curves (Continued)
100 V+ = 5V, 3V OUTPUT IMPEDANCE () 10 0 -10 VSOURCE = 1V CMRR (dB) 10 -20 -30 -40 -50 -60 -70 -80 -90 -100 1k V+ = 5V AV = +1 RL = 10k CL = 10pF VOUT = 100mVP-P 10k 100k 1M 10M 100M
VSOURCE = 0.1V 1
0.10 10k
100k
1M FREQUENCY (Hz)
10M
100M
FREQUENCY (Hz)
FIGURE 7. ENABLED OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 8. CMRR vs FREQUENCY
10 0 -10 -20 PSRR (dB) -30 -40 -50 -60 -70 -80 -90 -100 1k
0 V+ = 5V AV = +1 RL = 10k CL = 10pF VOUT = 100mVP-P PSRR+ -10 OFF ISOLATION (dB) -20 -30 -40 -50 -60 -70 10M 100M -80 10k 100k 1M 10M V+ = 5V AV = +1 RL = 10k CL = 10pF 100M 1G VP-P = 1V VP-P = 10mV VP-P = 100mV
PSRRPSRR+
10k
100k 1M FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. PSRR vs FREQUENCY
FIGURE 10. OFF ISOLATION vs FREQUENCY
-30 -40 -50 CROSSTALK (dB) THD + NOISE (%) -60 -70 -80 -90 -100 -110 -120 10k 100k 1M 10M FREQUENCY (Hz) 100M 1G VP-P = 1V
0.1 V+ = 5V RL = 10k 0.01 RF = 0, AV = 1 VOUT = 2VP-P 400Hz TO 22kHz FILTER
0.001
0.0001 0
2k
4k
6k
8k
10k 12k 14k 16k 18k 20k
FREQUENCY (Hz)
FIGURE 11. CHANNEL TO CHANNEL CROSSTALK vs FREQUENCY
FIGURE 12. THD+N vs FREQUENCY
6
FN6156.5 February 20, 2008
ISL28191, ISL28291 Typical Performance Curves (Continued)
1
0.1 THD +NOISE (%)
0.01
0.001
0.0001
INPUT VOLTAGE NOISE (nV/Hz)
1 0.1
V+ = 5V AV = +1 RL = 10k FREQUENCY = 1kHz FILTER = 400Hz TO 22kHz
10
0
0.5
1.0
1.5 2.0 VOUT (VP-P)
2.5
3.0
3.5
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 13. THD+N @ 1kHz vs VOUT
FIGURE 14. INPUT REFERRED NOISE VOLTAGE vs FREQUENCY
100 CURRENT NOISE (pA/Hz)
5 EN INPUT V+ = 5V AV = +1 RL = 10k CL = 10pF VIN = 1VDC
4 VOLTS (V)
3
10
2 ENABLE 1 OUTPUT DISABLE ENABLE
1 0.1
1
10
100
1k
10k
100k
0
-1
0
1 TIME (s)
2
3
4
FREQUENCY (Hz)
FIGURE 15. INPUT REFERRED NOISE CURRENT vs FREQUENCY
FIGURE 16. ENABLE/DISABLE TIMING
0.08 0.06 SMALL SIGNAL (V) 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 0 20 40 VIN VOUT LARGE SIGNAL (V)
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 140 160 180 200 -0.8 0 100 200 V+ = 2.5V AV = +2 RF = RG = 499 RL = 10k VOUT = 1VP-P 300 400 500 TIME (ns) 600 700 800 VOUT VIN
V+ = 2.5V AV = +1 RL = 10k VOUT = 100mVP-P 60 80 100 120 TIME (ns)
FIGURE 17. SMALL SIGNAL STEP RESPONSE
FIGURE 18. LARGE SIGNAL (1V) STEP RESPONSE
7
FN6156.5 February 20, 2008
ISL28191, ISL28291 Typical Performance Curves (Continued)
3 2 LARGE SIGNAL (V) 1 0 -1 -2 -3 V+ = 2.5V AV = +2 RF = RG = 499 RL = 10k VOUT = 4.7VP-P 0 400 800 1200 TIME (ns) 1600 2000 CURRENT (mA) VIN VOUT 3.5 3.3 3.1 2.9 2.7 2.5 2.3 2.1 1.9 1.7 1.5 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MIN n = 100 MEDIAN MAX
FIGURE 19. LARGE SIGNAL (4.7V) STEP RESPONSE
FIGURE 20. SUPPLY CURRENT vs TEMPERATURE, VS = 2.5V ENABLED, RL = INF
800 700 600 500 VOS (V) 400 300 200 100 0 -100 -200 -40
n = 100 MAX
-3.0 -3.2 -3.4
n = 100 MAX
MEDIAN
IBIAS+ (A)
-3.6 -3.8 -4.0
MEDIAN
MIN MIN -4.2 -4.4 -20 0 20 40 60 80 100 120 -4.6 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120
TEMPERATURE (C)
FIGURE 21. VOS vs TEMPERATURE, VS = 2.5V
FIGURE 22. IBIAS+ vs TEMPERATURE, VS = 2.5V
-3.0 -3.2 -3.4 -3.6 IBIAS- (A) -3.8 -4.0 -4.2 -4.4 -4.6 -4.8
n = 100
800 MAX 600
n = 100
MEDIAN IIO (nA)
400 200
MEDIAN
MIN
MAX 0 -200 MIN -400 -40
-5.0 -40
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 23. IBIAS- vs TEMPERATURE, VS = 2.5V
FIGURE 24. IIO vs TEMPERATURE, VS = 2.5V
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FN6156.5 February 20, 2008
ISL28191, ISL28291 Typical Performance Curves (Continued)
160 150 140 CMRR (dB) PSRR (dB) 130 120 110 100 90 80 70 -40 -20 0 20 40 60 MIN 80 100 120 72 70 -40 MEDIAN n = 100 MAX 82 80 78 MEDIAN 76 74 MIN n = 100 MAX
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 25. CMRR vs TEMPERATURE, VCM = 3.8V, VS = 2.5V
FIGURE 26. PSRR vs TEMPERATURE 1.5V TO 2.5V
4.990 n = 100 4.985 MAX VOUT (mV) 4.980 VOUT (V) MEDIAN 4.975 4.970 4.965 MIN 4.960 -40 -20 0 20 40 60 80 100 120
60 55 50 45 40 35 30 25 20 15 10 -40 -20 0 20 MIN 40 60 80 100 120 MEDIAN MAX n = 100
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 27. POSITIVE VOUT vs TEMPERATURE, RL = 1k VS = 2.5V
FIGURE 28. NEGATIVE VOUT vs TEMPERATURE, RL = 1k VS = 2.5V
Pin Descriptions
ISL28191 ISL28191 ISL28291 ISL28291 ISL28291 (6 Ld SOT-23) (6 Ld TDFN) (8 Ld SOIC) (10 Ld MSOP) (10 Ld TQFN) 4 2 2 (A) 6 (B) 2 (A) 8 (B) 1 (A) 7 (B) PIN NAME ININ-_A IN-_B FUNCTION Inverting input EQUIVALENT CIRCUIT
V+
IN-
IN+
VCircuit 1
3
3 3 (A) 5 (B) 3 (A) 7 (B) 4 2 (A) 6 (B) 3
IN+ IN+_B IN+_B V-
Non-inverting input Negative supply
(See circuit 1)
2
4
4
9
FN6156.5 February 20, 2008
ISL28191, ISL28291 Pin Descriptions (Continued)
ISL28191 ISL28191 ISL28291 ISL28291 ISL28291 (6 Ld SOT-23) (6 Ld TDFN) (8 Ld SOIC) (10 Ld MSOP) (10 Ld TQFN) 1 1 1 (A) 7 (B) 1 (A) 9 (B) 10 (A) 8 (B) PIN NAME FUNCTION EQUIVALENT CIRCUIT
V+
OUT Output OUT_A OUT_B
OUT
VCircuit 2
6 5
6 5
8 N/A
10 5 (A) 6 (B)
9 4 (A) 5 (B)
V+ EN EN_A EN_B
Positive supply Enable BAR pin internal pulldown; Logic "1" selects the disabled state; Logic "0" selects the enabled state.
V+
EN VCircuit 3
Applications Information
Product Description
The ISL28191 and ISL28291 are voltage feedback operational amplifiers designed for communication and imaging applications requiring low distortion, very low voltage and current noise. Both parts feature high bandwidth while drawing moderately low supply current. They use a classical voltage-feedback topology, which allows them to be used in a variety of applications where current-feedback amplifiers are not appropriate because of restrictions placed upon the feedback element used with the amplifier.
external series resistor may be used to limit the current, as shown in Figure 29.
R +
FIGURE 29. LIMITING THE INPUT CURRENT TO LESS THAN 5mA
Using Only One Channel
The ISL28291 is a dual channel op amp. If the application only requires one channel when using the ISL28291, the user must configure the unused channel to prevent it from oscillating. Oscillation can occur if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 30).
Enable/Power-Down
The ISL28191 and ISL28291 amplifiers are disabled by applying a voltage greater than 2V to the EN pin, with respect to the V- pin. In this condition, the output(s) will be in a high impedance state and the amplifier(s) current will be reduced to 13A/Amp. By disabling the part, multiple parts can be connected together as a MUX. The outputs are tied together in parallel and a channel can be selected by the EN pin. The EN pin also has an internal pull-down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default.
+
Input Protection
All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Both parts have additional back-to-back diodes across the input terminals (as shown in Figure 29). In pulse applications where the input Slew Rate exceeds the Slew Rate of the amplifier, the possibility exists for the input protection diodes to become forward biased. This can cause excessive input current and distortion at the outputs. If overdriving the inputs is necessary, the external input current must never exceed 5mA. An
FIGURE 30. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Low impedance ground plane construction is essential. Surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. The power supply pins must be well bypassed to
FN6156.5 February 20, 2008
10
ISL28191, ISL28291
reduce the risk of oscillation. The combination of a 4.7F tantalum capacitor in parallel with a 0.01F capacitor has been shown to work well when placed at each supply pin. For good AC performance, parasitic capacitance should be kept to a minimum, especially at the inverting input. When ground plane construction is used, it should be removed from the area near the inverting input to minimize any stray capacitance at that node. Carbon or Metal-Film resistors are acceptable with the Metal-Film resistors giving slightly less peaking and bandwidth because of additional series inductance. Use of sockets, particularly for the SOIC package, should be avoided if possible. Sockets add parasitic inductance and capacitance, which will result in additional peaking and overshoot. package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1:
T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 1)
where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated in Equation 2:
V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x --------------------------R
L
(EQ. 2)
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
Current Limiting
The ISL28191 and ISL28291 have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. This is why the output short circuit current is specified and tested with RL = 10.
Power Dissipation
It is possible to exceed the +125C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or
11
FN6156.5 February 20, 2008
ISL28191, ISL28291 SOT-23 Package Family
e1 A N 6 4
MDP0038
D
SOT-23 PACKAGE FAMILY MILLIMETERS SYMBOL A A1 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX 0.05 0.15 0.05 0.06 Basic Basic Basic Basic Basic 0.10 Reference Reference Rev. F 2/07 NOTES:
E1 2 3
E
A2 b c
0.20 C
0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D
D E E1 e e1 L L1 N
0.15 C A-B 2X C D
1
3
A2 SEATING PLANE 0.10 C NX A1
1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only).
(L1)
H
6. SOT23-5 version has no center lead (shown as a dashed line).
A
GAUGE PLANE c L 0 +3 -0
0.25
12
FN6156.5 February 20, 2008
ISL28191, ISL28291 Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)
E 6 4 A A B
L6.1.6x1.6A
6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL MIN 0.45 NOMINAL 0.50 0.127 REF 0.15 1.55 0.40 1.55 0.95 0.20 1.60 0.45 1.60 1.00 0.50 BSC 0.25 0.30 0.35 0.25 1.65 0.50 1.65 1.05 MAX 0.55 0.05 NOTES 4 4 Rev. 1 6/06 NOTES: 1. Dimensions are in mm. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. Coplanarity shall not exceed 0.08mm.
PIN 1 REFERENCE 2X 0.15 C 1 2X 0.15 C TOP VIEW e 1.00 REF 4 6 3
D
A A1 A3
A1
b D D2
L D2 CO.2 DAP SIZE 1.30 x 0.76
E E2 e L
3 E2
1
b 6X 0.10 M C A B
BOTTOM VIEW
DETAIL A 0.10 C 6X 0.08 C A3 SIDE VIEW C SEATING PLANE
3. Warpage shall not exceed 0.10mm. 4. Package length/package width are considered as special characteristics. 5. JEDEC Reference MO-229. 6. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389.
0.1270.008 0.127 +0.058 -0.008 TERMINAL THICKNESS A1 DETAIL A 0.25 0.50
1.00
0.45
1.00 2.00
0.30
1.25
LAND PATTERN
6
13
FN6156.5 February 20, 2008
ISL28191, ISL28291 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
14
FN6156.5 February 20, 2008
ISL28191, ISL28291 Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
D A B
L10.1.8x1.4A
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL MIN 0.45 NOMINAL 0.50 0.127 REF 0.15 1.75 1.35 0.20 1.80 1.40 0.40 BSC 0.35 0.45 0.40 0.50 10 2 3 0 12 0.45 0.55 0.25 1.85 1.45 MAX 0.55 0.05 NOTES 5 2 3 3 4 Rev. 3 6/06 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on D and E side, respectively. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions.
6 INDEX AREA 2X 2X 0.10 C
N
E
1 0.10 C
2
A A1
TOP VIEW
A3 b
0.10 C 0.05 C SEATING PLANE A1 SIDE VIEW A
D
C
E e L L1 N
(DATUM A) PIN #1 ID L1 NX L 1 2 NX b 5 10X 0.10 M C A B 0.05 M C 5 7 e BOTTOM VIEW (DATUM B)
Nd Ne
NX (b) 5
(A1)
C L
L SECTION "C-C" CC e TERMINAL TIP
9. JEDEC Reference MO-255. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389.
1.00
2.20 1.00 0.60
0.50 1.80 0.40 0.20 0.40 10 LAND PATTERN 0.20
15
FN6156.5 February 20, 2008
ISL28191, ISL28291 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 16
FN6156.5 February 20, 2008

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